axis_validator.v 696 B

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  1. `timescale 1 ns / 1 ps
  2. module axis_validator #
  3. (
  4. parameter integer AXIS_TDATA_WIDTH = 32
  5. )
  6. (
  7. // System signals
  8. input wire aclk,
  9. input wire trg_flag,
  10. // Slave side
  11. output wire s_axis_tready,
  12. input wire [AXIS_TDATA_WIDTH-1:0] s_axis_tdata,
  13. input wire s_axis_tvalid,
  14. // Master side
  15. input wire m_axis_tready,
  16. output wire [AXIS_TDATA_WIDTH-1:0] m_axis_tdata,
  17. output wire m_axis_tvalid
  18. );
  19. assign s_axis_tready = m_axis_tready;
  20. assign m_axis_tdata = s_axis_tdata;
  21. assign m_axis_tvalid = s_axis_tvalid & trg_flag;
  22. endmodule