logic_gate_and.v 176 B

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  1. module logic_and_gate(
  2. input exp_p_tri_io[0]
  3. input exp_p_tri_io[1]
  4. output exp_n_tri_io[0]
  5. )
  6. assign exp_n_tri_io[0] = exp_p_tri_io[0] & exp_p_tri_io[0]
  7. endmodule